Virtex UltraScale+ Series

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TPS-VU19P FPGA Platform GD+

TPS-VU19P FPGA Platform GD+

Virtex UltraScale+ XCVU19P

• System Logic Cells (K):8,938
• DSP Slices:3,840
• Memory (Mb): 165.9
• The system has 712 general purpose I/Os and 48 GTY transceivers on 8 high-speed connectors.
• DDR4 SODIMM * 2 ( Total: 32GB )
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DETAIL

TPS-VU19P GD+

Empowering Large-Scale SoC Innovation with Scalable Capacity and Intelligent Control.

High Capacity, Smart Monitoring, Remote Deployment: TPS m-View makes hardware verification simpler and more reliable.

Massive Capacity & Scalability

Equipped with 8,938K Logic Cells, providing ample verification space for ultra-large scale SoC designs.

High-Speed Connectivity

Configured with 48 GTY lanes and flexible I/O combinations to optimize system integration for complex interfaces.

Smart Management & Reliability

Built-in remote programming and real-time power/temperature monitoring ensure stability for long-term verification tasks.

Breaking Scale Limitations to Achieve High-Performance Prototyping

The TPS-VU19P GD+ is specifically designed for R&D teams seeking high-bandwidth I/O and large-capacity verification. With exceptional High-speed signal integrity capabilities, this platform ensures signal stability in high-speed transmission environments, helping customers achieve their targeted Time-to-market goals.

  • High Capacity & Performance: Powered by XCVU19P FPGA, featuring 8,938K logic cells and 165.9Mb of internal memory resources.
  • Remote Management Advantages: Integrated smart management center supports remote deployment and self-testing (Self-Test), significantly reducing operational and maintenance costs.
  • Diverse Interface Support: Flexible Daughter Card expansion mechanism satisfies requirements for Gen4 PCIe and various industrial-grade data interfaces.
  • High-Reliability Design: Equipped with automatic power-off protection and real-time voltage/temperature monitoring to prevent hardware damage from environmental anomalies.

Standard Configuration

Full support for mainstream development interfaces, enhancing debugging and data access efficiency:

USB 2.0 / Gigabit Ethernet / JTag / Micro SD Card

Data Security

Built-in hardware-level data protection to safeguard IC design IP security:

Support AES-Key 256-bit Encryption

Technical Specifications

TPS-VU19P GD+ Hardware Resources
Process Technology 16nm Virtex UltraScale+ Architecture
System Logic Cell 8,938 K
VCCINT Core Power 200A
Internal Memory 165.9 Mb (Block RAM: 75.9Mb, Ultra RAM: 90Mb)
Transceivers Max Rate GTYP: 16 Gbps
HP I/O Count 616
HD I/O Count 96
GTY Transceivers 48 (TX/RX)
DDR4 SODIMM Support 16GB / 2.4Gbps * 2 Slots
PCIe Compatibility Gen4 / Gen3 Supported
MIPI D-PHY 1.5 Gbps

Ready to Accelerate Your Innovation?

Detailed datasheets and technical documentation are available upon request.
Please contact our team for more information regarding the TPS-VU19P-GD+.

Contact Our Technical Team
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